The following components implement 8-bit digital data inputs and outputs that use log and stimulus files in the same "NNNNNNNNN:XX" format as the AVR Studio simulator where the Ns are the MCU cycle count in decimal and the XX is the stimulus value in hex. Note that AVR Studio simulates a 1.5 clock cycle debouncing delay on all inputs while VMLAB does not. To get identical cycle counts, the avrstim component manually adds the 1.5 cycle delay to all output changes.
Downloads
- avrlog-1.1.zip - Provides the 8-bit digital stimulus and logger components that use AVR Studio simulator format files.
- avrlog-1.1-src.zip - Provides source code to the AVR Studio format stimulus and logger components.
- avrlog-1.1-test.zip - Contains an example VMLAB project that uses both the avrlog and avrstim components. The provided "test.asm" and "input.sti" should produce an "output.log" identical to one produced by AVR Studio.